The present invention relates generally to the field of high-speed digital data processing systems, and more particularly, to routing messages on multiple links in multiprocessor computer systems.
Multiprocessor computer systems comprise a number of processing element nodes connected together by an interconnect network. Each processing element node includes at least one processing element. The interconnect network transmits packets of information or messages between processing element nodes. Multiprocessor computer systems having up to hundreds or thousands of processing element nodes are typically referred to as massively parallel processing (MPP) systems. In a typical multiprocessor MPP system, every processing element can directly address all of memory, including the memory of another (remote) processing element, without involving the processor at that processing element. Instead of treating processing element-to-remote-memory communications as an I/O operation, reads or writes to another processing element""s memory are accomplished in the same manner as reads or writes to the local memory. In such multiprocessor MPP systems, the infrastructure that supports communications among the various processors greatly affects the performance of the MPP system because of the level of communications required among processors.
One way the infrastructure affects the performance of an MPP system is in the amount of bandwidth the infrastructure provides. Bandwidth is the maximum amount of data that can be sent through a network connection at a given time. Bandwidth is typically measured in bits per second (bps). The bandwidth available in current MPP systems often limits the performance of the MPP system.
Another way the infrastructure affects the performance of an MPP system is in the level of fault tolerance provided by the infrastructure. For example, if a segment of the communications path fails, the MPP is unable to continue normal operation unless an alternate or redundant path is provided. However, redundant paths are difficult to compute (often requiring complicated calculations). Further more, switching traffic to the redundant path is often difficult.
For these and other reasons, there is a need for a multiprocessor system with an improved infrastructure.
The present invention provides a multiprocessor computer system having a plurality of processing element nodes and an interconnect network interconnecting the plurality of processing element nodes. An interface circuit is associated with each one of the plurality of processing element nodes. The interface circuit has a lookup table having n-number of routing entries for a given destination node. Each one of the n-number of routing entries associated with a different class of traffic.